Interconnect structures are used in semiconductor manufacturing to connect active and passive devices or structures at different wiring levels of the chip. Interconnect structures can be of composed of different metal or metal alloy materials such as, e.g., tungsten (W) or copper (Cu). For example, middle of the line processes typically include tungsten; whereas, back end of the line processes typically include copper.
By virtue of continued scaling of device technologies, interconnect structures need to be reduced in size. For example, interconnect structures with dimensions of less than 30 nm are now required in many semiconductor processes. As the interconnect structures scale downwards, different metals or metal alloys are required with lower resistivities in order to improve device performance. To this end, cobalt (Co) is currently being explored and/or used as an alternative to tungsten or copper, as the resistivity of cobalt is lower than copper and tungsten at smaller dimensional sizes. Cobalt, though, poses a challenge during etching and wet cleaning processes. For example, reactive ion etching (RIE) processes modify the surface of the cobalt with oxygen or fluorine and subsequent etching and wet clean processes (e.g., dHF processes) tend to dissolve the cobalt, e.g., modified surface of the cobalt, damaging the interconnect structure.